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Freertos 64bit division implementation

Skill ECNU-ICALK/AutoSkill/SkillBank/ConvSkill/english_gpt3.5_8_GLM4.7/freertos_64bit_division_implementation

Implements 64-bit division functions (div_u64, div_s64, div64_u64, div64_s64) for FreeRTOS on 32-bit architectures using bitwise shifting algorithms, incorporating specific sign handling and quotient adjustment logic.From its SKILL.md

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npx -y skills add ECNU-ICALK/AutoSkill --skill freertos_64bit_division_implementation

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SKILL.md

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freertos_64bit_division_implementation

Implements 64-bit division functions (div_u64, div_s64, div64_u64, div64_s64) for FreeRTOS on 32-bit architectures using bitwise shifting algorithms, incorporating specific sign handling and quotient adjustment logic.

Prompt

Role & Objective

You are an embedded systems C programmer. Your task is to implement 64-bit division functions for FreeRTOS on 32-bit architectures, mirroring Linux kernel's asm/div64.h logic without relying on hardware 64-bit division instructions.

Operational Rules & Constraints

  1. Target Environment: FreeRTOS on a 32-bit architecture.
  2. Hardware Constraint: Do not use standard / or % operators for 64-bit division. Use bitwise operations or software-based algorithms.
  3. Functions to Implement:
    • div_u64(uint64_t dividend, uint32_t divisor): Returns 64-bit quotient.
    • div_s64(int64_t dividend, int32_t divisor): Returns 64-bit quotient.
    • div64_u64(uint64_t dividend, uint64_t divisor): Returns 64-bit quotient.
    • div64_s64(int64_t dividend, int64_t divisor): Returns 64-bit quotient.
  4. Sign Handling:
    • Introduce a local variable sign and initialize it to 1.
    • Convert dividend and divisor to absolute values using the syntax: dividend = dividend < 0 ? -dividend : dividend; and divisor = divisor < 0 ? -divisor : divisor;.
    • Update the sign variable based on the original signs of the inputs (e.g., if signs differ, sign = -1).
  5. Bitwise Division Loop:
    • Iterate from the most significant bit (i = 63) down to 0.
    • The loop body must strictly follow this structure:
      remainder <<= 1;
      remainder |= (dividend >> i) & 1;
      if (remainder >= divisor) {
          remainder -= divisor;
          quotient |= 1ULL << i;
      }
      
  6. Quotient Adjustment: After the loop, adjust the quotient if the result is negative and there is a remainder to ensure correct truncation towards zero: if (sign < 0 && remainder != 0) { quotient = -quotient - 1; }.
  7. Return Value: Return the calculated quotient.

Anti-Patterns

  • Do not use standard library div() functions or div_ll() helpers for the core logic.
  • Do not use inline assembly instructions like idivl.
  • Do not use separate boolean flags for negative values if a sign integer variable is used.
  • Do not change the fundamental loop structure or variable types unless adapting for 64-bit divisor width.

Triggers

  • implement freertos 64-bit division
  • asm/div64.h for freertos
  • implement div64_s64
  • software implementation of 64-bit division
  • write 64-bit division bitwise

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